Author of the publication

Harnessing Machine Learning to Improve the Success Rate of Stimuli Generation.

, , , , , and . IEEE Trans. Computers, 55 (11): 1344-1355 (2006)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A Framework for the Validation of Processor Architecture Compliance., , , , and . DAC, page 902-905. IEEE, (2007)Intelligent Interleaving of Scenarios: A Novel Approach to System Level Test Generation., , , and . DAC, page 891-895. IEEE, (2007)Path-Based System Level Stimuli Generation., , and . Haifa Verification Conference, volume 3875 of Lecture Notes in Computer Science, page 1-13. Springer, (2005)Reuse in system-level stimuli-generation., , , , , and . HLDVT, page 105-111. IEEE Computer Society, (2005)Addressing Test Generation Challenges for Configurable Processor Verification., , , , , , and . HLDVT, page 95-101. IEEE Computer Society, (2006)Harnessing Machine Learning to Improve the Success Rate of Stimuli Generation., , , , , and . IEEE Trans. Computers, 55 (11): 1344-1355 (2006)Constraint-Based Random Stimuli Generation for Hardware Verification., , , , , , and . AAAI, page 1720-1727. AAAI Press, (2006)Constraint-Based Random Stimuli Generation for Hardware Verification., , , , , , and . AI Magazine, 28 (3): 13-30 (2007)Quality Improvement Methods for System-Level Stimuli Generation., , , and . ICCD, page 204-206. IEEE Computer Society, (2004)Harnessing machine learning to improve the success rate of stimuli generation., , , , , and . HLDVT, page 112-118. IEEE Computer Society, (2005)