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Fast Hardware Construction and Refitting of Quantized Bounding Volume Hierarchies., , , , and . Comput. Graph. Forum, 36 (4): 167-178 (2017)Programmable and Scalable Architecture for Graphics Processing Units., , , and . T. HiPEAC, (2019)Evaluation of Different Processor Architecture Organizations for On-Site Electronics in Harsh Environments., , , , , and . Int. J. Parallel Program., 49 (4): 541-569 (2021)Resource conflict detection in simulation of function unit pipelines., , and . J. Syst. Archit., 54 (11): 1058-1064 (2008)Improving Code Density with Variable Length Encoding Aware Instruction Scheduling., , , , and . J. Signal Process. Syst., 84 (3): 435-446 (2016)Software Defined Radio Implementation of a Digital Self-interference Cancellation Method for Inband Full-Duplex Radio Using Mobile Processors., , , , , and . J. Signal Process. Syst., 90 (10): 1297-1309 (2018)Instantaneous foveated preview for progressive Monte Carlo rendering., , , , , and . Comput. Vis. Media, 4 (3): 267-276 (2018)Towards Efficient Code Generation for Exposed Datapath Architectures., , , , , and . SCOPES, page 86-89. ACM, (2019)TauBench 1.1: A Dynamic Benchmark for Graphics Rendering., , , and . CoRR, (2023)Cross-vendor programming abstraction for diverse heterogeneous platforms., , and . Frontiers Comput. Sci., (2022)