( en | de | ru )

 

Disambiguation of "Chandrakasan, Anantha P."

Author of the publication

copydeleteadd this publication to your clipboard
Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology.

, , and . DAC, page 409-414. ACM Press, (1997)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Anantha Swamy

Priyanka Anantha Narasimhan

P Kock

P Krebietke

P Narayanan

 

Other publications of authors with the same name

A ZVS resonant receiver with maximum efficiency tracking for device-to-device wireless charging., and . ESSCIRC, page 313-316. IEEE, (2016)An energy-efficient reconfigurable DTLS cryptographic engine for End-to-End security in iot applications., , , , and . ISSCC, page 42-44. IEEE, (2018)Towards High-Performance Bufferless NoCs with SCEPTER., , and . IEEE Comput. Archit. Lett., 15 (1): 62-65 (2016)Full-chip subthreshold leakage power prediction and reduction techniques for sub-0.18-μm CMOS., , , , and . IEEE J. Solid State Circuits, 39 (3): 501-510 (2004)A Threshold Implementation-Based Neural Network Accelerator With Power and Electromagnetic Side-Channel Countermeasures., , , and . IEEE J. Solid State Circuits, 58 (1): 141-154 (2023)Standby power reduction using dynamic voltage scaling and canary flip-flop structures., and . IEEE J. Solid State Circuits, 39 (9): 1504-1511 (2004)A 0.31-THz Orbital-Angular-Momentum (OAM) Wave Transceiver in CMOS With Bits-to-OAM Mode Mapping., , , , , , and . IEEE J. Solid State Circuits, 57 (5): 1344-1357 (2022)500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC., and . IEEE J. Solid State Circuits, 42 (4): 739-747 (2007)A micropower programmable DSP using approximate signal processing based on distributed arithmetic., and . IEEE J. Solid State Circuits, 39 (2): 337-347 (2004)Ultra-dynamic Voltage scaling (UDVS) using sub-threshold operation and local Voltage dithering., and . IEEE J. Solid State Circuits, 41 (1): 238-245 (2006)