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Adaptive Multi-level Blocking Optimization for Sparse Matrix Vector Multiplication on GPU., , and . ICCS, volume 80 of Procedia Computer Science, page 131-142. Elsevier, (2016)High-Performance Sparse Matrix-Matrix Products on Intel KNL and Multicore Architectures., , , and . ICPP Workshops, page 34:1-34:10. ACM, (2018)Batched Sparse Matrix Multiplication for Accelerating Graph Convolutional Networks., , , and . CCGRID, page 231-240. IEEE, (2019)Performance optimization, modeling and analysis of sparse matrix-matrix products on multi-core and many-core processors., , , and . Parallel Comput., (2019)MRG8: Random Number Generation for the Exascale Era., , , , and . PASC, page 6:1-6:11. ACM, (2018)A traffic-aware memory-cube network using bypassing., , , , , , and . Microprocess. Microsystems, (April 2022)Efficient Collision-Free MTTKRP Algorithm for Multi-core CPUs with Less Memory Usage., and . CCGRID, page 534-543. IEEE, (2022)High-Performance and Memory-Saving Sparse General Matrix-Matrix Multiplication for NVIDIA Pascal GPU., , and . ICPP, page 101-110. IEEE Computer Society, (2017)Low-Latency Low-Energy Memory-Cube Networks using Dual-Voltage Datapaths., , , , , , and . PDP, page 143-147. IEEE, (2021)Cache-aware sparse matrix formats for Kepler GPU., , and . ICPADS, page 281-288. IEEE Computer Society, (2014)