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Tejas Simulator : Validation against Hardware., , , and . CoRR, (2015)DUST: a generalized notion of similarity between uncertain time series., and . KDD, page 383-392. ACM, (2010)Reusing trace buffers to enhance cache performance., , and . DATE, page 572-577. IEEE, (2017)Tejas: A java based versatile micro-architectural simulator., , , , and . PATMOS, page 47-54. IEEE, (2015)Managing Trace Summaries to Minimize Stalls During Postsilicon Validation., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (6): 1881-1894 (2017)Optical Overlay NUCA: A High-Speed Substrate for Shared L2 Caches., , , , and . ACM J. Emerg. Technol. Comput. Syst., 13 (4): 53:1-53:25 (2017)Toward an Optimal Countermeasure for Cache Side-Channel Attacks., and . IEEE Embed. Syst. Lett., 15 (3): 141-144 (September 2023)Area-Aware Cache Update Trackers for Postsilicon Validation., , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (5): 1794-1807 (2016)GPUOPT: Power-efficient Photonic Network-on-Chip for a Scalable GPU., and . ACM J. Emerg. Technol. Comput. Syst., 17 (1): 8:1-8:26 (2020)Providing Accountability in Heterogeneous Systems-on-Chip., and . ACM Trans. Embed. Comput. Syst., 17 (5): 83:1-83:24 (2018)