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Verification of Synchronization in SpecC Description with the Use of Difference Decision Diagrams.

, , и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 86-A (12): 3192-3199 (2003)

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Другие публикации лиц с тем же именем

VERIFUL: VERIfication using FUnctional Learning., , и . ED&TC, стр. 444-448. IEEE Computer Society, (1995)LUT-based Arithmetic Circuit Approximation with Formal Guarantee on Worst Case Relative Error., , , и . LATS, стр. 1-2. IEEE, (2023)Simultaneous Circuit Transformation and Routing., , , и . ASP-DAC/VLSI Design, стр. 479-483. IEEE Computer Society, (2002)Synthesis of LUT Based Approximating Adder Circuits with Formal Error Guarantees., , , и . VDAT, том 1687 из Communications in Computer and Information Science, стр. 435-449. Springer, (2022)On More Efficient Combinational ATPG Using Functional Learning., , , , и . VLSI Design, стр. 107-110. IEEE Computer Society, (1996)Distributed Particle-Based Rendering Framework for Large Data Visualization on HPC Environments., , , , , и . HPCS, стр. 300-307. IEEE, (2017)Automatic assertion extraction in gate-level simulation using GPGPUs., , и . ICCD, стр. 522-523. IEEE Computer Society, (2012)Efficient variable ordering using aBDD based sampling., , , и . DAC, стр. 687-692. ACM, (2000)A Post-Silicon Debug Support Using High-Level Design Description., , , и . Asian Test Symposium, стр. 137-142. IEEE Computer Society, (2009)Kinetic analysis in human brain of 11C(R)-rolipram, a positron emission tomographic radioligand to image phosphodiesterase 4: A retest study and use of an image-derived input function., , , , , , , , и . NeuroImage, 54 (3): 1903-1909 (2011)