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Primal-dual method based simultaneous functional unit and register binding., , , , and . ASICON, page 1-4. IEEE, (2015)A Unified Scheduling Approach for Power and Resource Optimization With Multiple Vdd or/and Vth in High-Level Synthesis., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (12): 2030-2043 (2017)Research on Innovative Trim Method for Tiltrotor Aircraft Take-Off Based on Genetic Algorithm., , , , and . J. Sensors, (2020)Effective Algorithm-Accelerator Co-design for AI Solutions on Edge Devices., , , , , , and . ACM Great Lakes Symposium on VLSI, page 283-290. ACM, (2020)Hybrid Graph Models for Logic Optimization via Spatio-Temporal Information., , , and . CoRR, (2022)On-FPGA Training with Ultra Memory Reduction: A Low-Precision Tensor Method., , , , and . CoRR, (2021)Extensible and Efficient Proxy for Neural Architecture Search., , , , , and . ICCV, page 6176-6187. IEEE, (2023)A Bi-Directional Co-Design Approach to Enable Deep Learning on IoT Devices., , , , , , and . CoRR, (2019)Program-to-Circuit: Exploiting GNNs for Program Representation and Circuit Translation., , , , and . CoRR, (2021)FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edge., , , , , , , and . DAC, page 206. ACM, (2019)