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A variation-adaptive retiming method exploiting reconfigurability., , , , and . FPL, page 1-4. IEEE, (2013)Ultra-low latency continuous block-parallel stream windowing using FPGA on-chip memory., , , and . FPT, page 56-63. IEEE, (2017)Degradation in FPGAs: measurement and modelling., , , and . FPGA, page 229-238. ACM, (2010)Improved delay measurement method in FPGA based on transition probability., and . FPGA, page 163-172. ACM, (2011)Combating process variation on FPGAS with a precise at-speed delay measurement method., , and . FPL, page 703-704. IEEE, (2008)A two-stage variation-aware placement method for FPGAS exploiting variation maps classification., , , , and . FPL, page 519-522. IEEE, (2012)Exploiting stochastic delay variability on FPGAs with adaptive partial rerouting., , , , and . FPT, page 254-261. IEEE, (2013)Measuring and modeling FPGA clock variability., , and . FPGA, page 258. ACM, (2008)Mitigation of process variation effect in FPGAs with partial rerouting method., , , , and . IEICE Electron. Express, 11 (3): 20140011 (2014)High-Throughput Line Buffer Microarchitecture for Arbitrary Sized Streaming Image Processing., , and . J. Imaging, 5 (3): 34 (2019)