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Utilizing Reuse Information in Data Cache Management.

, , , , and . International Conference on Supercomputing, page 449-456. ACM, (1998)

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Techniques for extracting instruction level parallelism on MIMD architectures., and . MICRO, page 128-137. ACM / IEEE Computer Society, (1993)A modified approach to data cache management., , , and . MICRO, page 93-103. ACM / IEEE Computer Society, (1995)MISC: a Multiple Instruction Stream Computer., , and . MICRO, page 193-196. ACM / IEEE Computer Society, (1992)Exhaustive Optimization Phase Order Space Exploration., , , and . CGO, page 306-318. IEEE Computer Society, (2006)Archer: A Community Distributed Computing Infrastructure for Computer Architecture Research and Education., , , , , , , , , and 3 other author(s). CollaborateCom, volume 10 of Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, page 70-84. Springer / ICST, (2008)Allocation by Conflict: A Simple Effective Multilateral Cache Management Scheme., , , and . ICCD, page 133-141. IEEE Computer Society, (2001)Enhancing the effectiveness of utilizing an instruction register file., and . IPDPS, page 1-5. IEEE, (2008)Quantifying instruction-level parallelism limits on an EPIC architecture., , and . ISPASS, page 21-27. IEEE Computer Society, (2000)Reducing the cost of conditional transfers of control by using comparison specifications., , , and . LCTES, page 64-71. ACM, (2006)On High-Bandwidth Data Cache Design for Multi-Issue Processors., , , and . MICRO, page 46-56. ACM/IEEE Computer Society, (1997)