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Catena: A Near-Threshold, Sub-0.4-mW, 16-Core Programmable Spatial Array Accelerator for the Ultralow-Power Mobile and Embedded Internet of Things., , , , , and . IEEE J. Solid State Circuits, 55 (8): 2270-2284 (2020)An experimental survey of energy management across the stack., and . OOPSLA, page 329-344. ACM, (2014)vbench: Benchmarking Video Transcoding in the Cloud., , , , , , and . ASPLOS, page 797-809. ACM, (2018)Computation vs. Memory Systems: Pinning Down Accelerator Bottlenecks., and . ISCA Workshops, volume 6161 of Lecture Notes in Computer Science, page 86-98. Springer, (2010)Deadlock-free joins in DB-mesh, an asynchronous systolic array accelerator., , , and . DaMoN, page 5:1-5:8. ACM, (2017)Fast Computational GPU Design with GT-Pin., , , , , , and . IISWC, page 76-86. IEEE Computer Society, (2015)The Cache and Codec Model for Storing and Manipulating Data., and . IEEE Micro, 34 (4): 28-35 (2014)From functional programs to pipelined dataflow circuits., , and . CC, page 76-86. ACM, (2017)Compositional Dataflow Circuits., , , and . ACM Trans. Embed. Comput. Syst., 18 (1): 5:1-5:27 (2019)Master of none acceleration: a comparison of accelerator architectures for analytical query processing., , , , , , and . ISCA, page 762-773. ACM, (2019)