Author of the publication

Scalable Automated Verification via Expert-System Guided Transformations.

, , , , and . FMCAD, volume 3312 of Lecture Notes in Computer Science, page 159-173. Springer, (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Paruthi, Viresh
add a person with the name Paruthi, Viresh
 

Other publications of authors with the same name

Verification of Galois field based circuits by formal reasoning based on computational algebraic geometry., , , , , and . Formal Methods Syst. Des., 45 (2): 189-212 (2014)Automatic Verification of Floating Point Units., , , , , and . DAC, page 151:1-151:6. ACM, (2014)Formal verification of arbiters using property strengthening and underapproximations., , and . FMCAD, page 21-24. IEEE, (2010)Hybrid verification of a hardware modular reduction engine., , , , , and . FMCAD, page 207-214. FMCAD Inc., (2011)Functional verification of the POWER4 microprocessor and POWER4 multiprocessor system., , , , , , , , , and 15 other author(s). IBM J. Res. Dev., 46 (1): 53-76 (2002)Circuit-based Boolean Reasoning., , and . DAC, page 232-237. ACM, (2001)Exploiting suspected redundancy without proving it., , , and . DAC, page 463-466. ACM, (2005)Scalable Automated Verification via Expert-System Guided Transformations., , , , and . FMCAD, volume 3312 of Lecture Notes in Computer Science, page 159-173. Springer, (2004)Designer-level verification: an industrial experience story., , , , , , , , , and 1 other author(s). DATE, page 410-411. ACM, (2015)Formal verification of error correcting circuits using computational algebraic geometry., , , , and . FMCAD, page 141-148. IEEE, (2012)