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Robust and Nonrobust Path Delay Fault Simulation by Parallel Processing of Patterns.

, , and . IEEE Trans. Computers, 41 (12): 1527-1536 (1992)

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DYNAMITE: an efficient automatic test pattern generation system for path delay faults., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 10 (10): 1323-1335 (1991)Advanced automatic test pattern generation techniques for path delay faults., , and . FTCS, page 44-51. IEEE Computer Society, (1989)Prüfgerechter Entwurf und Test hochintegrierter Schaltungen., and . Inform. Spektrum, 15 (1): 23-32 (1992)Robust and Nonrobust Path Delay Fault Simulation by Parallel Processing of Patterns., , and . IEEE Trans. Computers, 41 (12): 1527-1536 (1992)Ein neues, effizientes Verfahren zum Testpunkteeinbau in kombinatorischen Schaltungen., and . Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme, volume 255 of Informatik-Fachberichte, page 195-206. Springer, (1990)A Test-Pattern-Generation Algorithm for Sequential Circuits., and . IEEE Des. Test Comput., 8 (2): 72-86 (1991)Accelerated Fault Simulation and Fault Grading in Combinational Circuits., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 6 (5): 704-712 (1987)Parallel Pattern Fault Simulation of Path Delay Faults., , and . DAC, page 357-363. ACM Press, (1989)