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Optimal layout recycling based on graph theoretic linear programming approach., , , and . VLSI, volume A-42 of IFIP Transactions, page 25-34. North-Holland, (1993)High Performance Java Hardware Engine and Software Kernel for Embedded Systems., , , and . VLSI-SOC, volume 218 of IFIP Conference Proceedings, page 109-120. Kluwer, (2001)Design of Ogg Vorbis Decoder System for Embedded Platform., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 88-A (8): 2124-2130 (2005)On the layering problem of multilayer PWB wiring., , and . Graph Theory and Algorithms, volume 108 of Lecture Notes in Computer Science, page 20-37. Springer, (1980)Automatic layout recycling based on layout description and linear programming., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 15 (8): 959-967 (1996)Some comments on permutation layout.. Networks, 10 (2): 179-182 (1980)VLSI implementation of inverse discrete cosine transformer and motion compensator for MPEG2 HDTV video decoding., , , and . IEEE Trans. Circuits Syst. Video Techn., 5 (5): 387-395 (1995)Recursive maximum likelihood decoder for high-speed satellite communication., , , , , , and . ISCAS (4), page 572-575. IEEE, (1999)VLSI architecture of digital matched filter and prime interleaver for W-CDMA., , , , and . ISCAS (3), page 269-272. IEEE, (2002)An automatic layout method for timing pulse generator of small LCD driver., , , , , , and . ECCTD, page 697-700. IEEE, (2011)