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Disambiguation of "Abella, Jaume"

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A cache design for probabilistically analysable real-time systems.

, , , and . DATE, page 513-518. EDA Consortium San Jose, CA, USA / ACM DL, (2013)

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Eligio Abella

Eligio Abella

Eligio Abella

Eligio Abella

Mathieu Jaume

 

Other publications of authors with the same name

Heart of Gold: Making the Improbable Happen to Increase Confidence in MBPTA., , , , and . ECRTS, page 255-265. IEEE Computer Society, (2014)PUB: Path Upper-Bounding for Measurement-Based Probabilistic Timing Analysis., , , , , and . ECRTS, page 276-287. IEEE Computer Society, (2014)On the Comparison of Deterministic and Probabilistic WCET Estimation Techniques., , , , and . ECRTS, page 266-275. IEEE Computer Society, (2014)Near-Optimal Loop Tiling by Means of Cache Miss Equations and Genetic Algorithms., , , and . ICPP Workshops, page 568-580. IEEE Computer Society, (2002)Modeling Contention Interference in Crossbar-based Systems via Sequence-Aware Pairing (SeAP)., , , , and . RTAS, page 253-266. IEEE, (2020)Towards limiting the impact of timing anomalies in complex real-time processors., , , , and . ASP-DAC, page 27-32. ACM, (2019)Contention in Multicore Hardware Shared Resources: Understanding of the State of the Art., , , , , and . WCET, volume 39 of OASIcs, page 31-42. Schloss Dagstuhl - Leibniz-Zentrum für Informatik, (2014)Efficient cache architectures for reliable hybrid voltage operation using EDC codes., , and . DATE, page 917-920. EDA Consortium San Jose, CA, USA / ACM DL, (2013)LAEC: Look-Ahead Error Correction Codes in Embedded Processors L1 Data Cache., , , and . DATE, page 818-823. IEEE, (2019)Assessing the Adherence of an Industrial Autonomous Driving Framework to ISO 26262 Software Guidelines., , , , and . DAC, page 9. ACM, (2019)