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A dynamic element matching technique for reduced-distortion multibit quantization in delta-sigma ADCs.

, , and . ISCAS (2), page 290-293. IEEE, (1999)

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A 14b 100MS/s DAC with Fully Segmented Dynamic Element Matching., and . ISSCC, page 2390-2399. IEEE, (2006)An audio ADC delta-sigma modulator with 100 dB SINAD and 102 dB DR using a second-order mismatch-shaping DAC., , and . CICC, page 17-20. IEEE, (2000)A Wide-Bandwidth 2.4GHz ISM-Band Fractional-N PLL with Adaptive Phase-Noise Cancellation., , and . ISSCC, page 302-604. IEEE, (2007)An Efficient Three-Point Arc Algorithm. Computer Graphics and Applications, IEEE, 9 (6): 44--49 (November 1989)One-bit Dithering in Delta-Sigma Modulator-based D/A Conversion.. ISCAS, page 1310-1313. IEEE, (1993)Digital Background Correction of Harmonic Distortion in Pipelined ADCs., and . IEEE Trans. Circuits Syst. I Regul. Pap., 53-I (9): 1885-1895 (2006)An audio ADC Delta-Sigma modulator with 100-dB peak SINAD and 102-dB DR using a second-order mismatch-shaping DAC., , and . IEEE J. Solid State Circuits, 36 (3): 339-348 (2001)A dynamic element matching technique for reduced-distortion multibit quantization in delta-sigma ADCs., , and . ISCAS (2), page 290-293. IEEE, (1999)A reconfigurable mostly-digital ΔΣ ADC with a worst-case FOM of 160dB., and . VLSIC, page 166-167. IEEE, (2012)A necessary and sufficient condition for mismatch shaping in multi-bit DACs., and . ISCAS (1), page 105-108. IEEE, (2002)