( en | de | ru )

 

Disambiguation of "Kumar, Anshul"

Author of the publication

copydeleteadd this publication to your clipboard
VisSched: An Auction-Based Scheduler for Vision Workloads on Heterogeneous Processors.

, , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (11): 4252-4265 (2020)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Anshul Sawant

Anshul Bhardwaj

Anshul Dubey

Anshul Gupta

Rohini Kumar

 

Other publications of authors with the same name

Built-in Self Test Based on Multiple On-Chip Signature Checking., , and . J. Electron. Test., 14 (3): 227-244 (1999)A SysML Profile for Development and Early Validation of TLM 2.0 Models., , and . ECMFA, volume 6698 of Lecture Notes in Computer Science, page 299-311. Springer, (2011)PLSS: A Scheduler for Multi-core Embedded Systems., , and . ARCS, volume 10172 of Lecture Notes in Computer Science, page 164-176. Springer, (2017)Automatically Customising VLIW Architectures with Coarse Grained Application-Specific Functional Units., , , and . SCOPES, volume 3199 of Lecture Notes in Computer Science, page 17-32. Springer, (2004)A scheme for multiple on-chip signature checking for embedded SRAMS., , and . J. Syst. Archit., 46 (2): 181-199 (2000)Bus Width Aware Off-Chip Memory Access Minimization for CNN Accelerators., , and . ISVLSI, page 240-245. IEEE, (2020)VisSched: An Auction-Based Scheduler for Vision Workloads on Heterogeneous Processors., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (11): 4252-4265 (2020)Exploring Storage Organization in ASIP Synthesis., , and . DSD, page 120-127. IEEE Computer Society, (2003)Application Specific Datapath Extension with Distributed I/O Functional Units., , and . VLSI Design, page 551-558. IEEE Computer Society, (2007)On-Chip Signature Checking for Embedded Memories., , and . VLSI Design, page 558-563. IEEE Computer Society, (1998)