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Declarative Loop Tactics for Domain-specific Optimization.

, , , and . ACM Trans. Archit. Code Optim., 16 (4): 55:1-55:25 (2020)

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TDO-CIM: Transparent Detection and Offloading for Computation In-memory., , , , , , and . DATE, page 1602-1605. IEEE, (2020)A Review of Near-Memory Computing Architectures: Opportunities and Challenges., , , , , , , and . DSD, page 608-617. IEEE Computer Society, (2018)Progressive Raising in Multi-level IR., , , , , , and . CGO, page 15-26. IEEE, (2021)Near-memory computing: Past, present, and future., , , , , , , and . Microprocess. Microsystems, (2019)Declarative Loop Tactics for Domain-specific Optimization., , , and . ACM Trans. Archit. Code Optim., 16 (4): 55:1-55:25 (2020)Polygeist: Raising C to Polyhedral MLIR., , , and . PACT, page 45-59. IEEE, (2021)MOM: Matrix Operations in MLIR., , , , , and . CoRR, (2022)PET-to-MLIR: A polyhedral front-end for MLIR., , , , and . DSD, page 551-556. IEEE, (2020)SEER: Super-Optimization Explorer for High-Level Synthesis using E-graph Rewriting., , , , and . ASPLOS (2), page 1029-1044. ACM, (2024)Automatic Generation of Multi-Objective Polyhedral Compiler Transformations., , , , and . PACT, page 83-96. ACM, (2020)