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A two-bit-per-cycle successive-approximation ADC with background offset calibration., , , , и . ICECS, стр. 650-653. IEEE, (2008)Time-domain equivalent design of continuous-time ΣΔ modulators., и . ICECS, стр. 543-546. IEEE, (2010)On the design of incremental data converters with extended range., и . LASCAS, стр. 1-4. IEEE, (2015)Servo-controlled remote powering and low-power data communication of implantable bio-systems for freely moving animals., , , и . BioCAS, стр. 508-511. IEEE, (2014)A Voltage-Time Model for Memristive Devices., , , , и . IEEE Trans. Very Large Scale Integr. Syst., 26 (8): 1452-1460 (2018)A Pseudorandom Number Generator Based on Time-Variant Recursion of Accumulators., , , и . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (9): 580-584 (2011)A 10-MHz Bandwidth Two-Path Third-Order ΣΔ Modulator With Cross-Coupling Branches., , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (10): 1410-1414 (2018)Cancellation of Amplifier Offset and 1/f Noise: An Improved Chopper Stabilized Technique., , , и . IEEE Trans. Circuits Syst. II Express Briefs, 54-II (6): 469-473 (2007)Comments on "Efficient Multibit Quantization in Continuous-Time Sigma Delta Modulators"., и . IEEE Trans. Circuits Syst. I Regul. Pap., 56-I (1): 280 (2009)Analysis of Parasitic Effects in Filamentary-Switching Memristive Memories Using an Approximated Verilog-A Memristor Model., , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (5): 1935-1947 (2019)