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Disambiguation of "Leblebici, Yusuf"

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Non-filamentary non-volatile memory elements as synapses in neuromorphic systems.

, , , , , , , , , and . NVMTS, page 1-6. IEEE, (2019)

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Yusuf

Erhan Leblebici

Nigem Yusuf

Faisal Yusuf

Sherif Yusuf

 

Other publications of authors with the same name

Design Considerations and Performance Trade-Offs for 56Gb/s Discrete Multi-Tone Electrical Link., , , , and . MWSCAS, page 1147-1150. IEEE, (2019)Programmable active pixel sensor for low-light biomedical applications., , , and . BioCAS, page 655-658. IEEE, (2014)Self-Calibrated Delay-Based LSB Extraction for Resolution Improvement in SAR ADCs., , and . NORCAS, page 1-7. IEEE, (2019)Co-Design of ReRAM Passive Crossbar Arrays Integrated in 180 nm CMOS Technology., , , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (3): 339-351 (2016)Load Optimization of an Inductive Power Link for Remote Powering of Biomedical Implants., , , , , , and . ISCAS, page 533-536. IEEE, (2009)Full-custom CMOS realization of a high-performance binary sorting engine with linear area-time complexity., , and . ISCAS (5), page 453-456. IEEE, (2003)Robust and fault-tolerant circuit design for nanometer-scale devices and single-electron transistors., and . ISCAS (3), page 685-688. IEEE, (2004)Breaking the Power-Delay Tradeoff: Design of Low-Power High-Speed MOS Current-Mode Logic Circuits Operating with Reduced Supply Voltage., and . ISCAS, page 1871-1874. IEEE, (2007)Integrating bio-sensing functions on CMOS chips., , , , , , and . APCCAS, page 548-551. IEEE, (2010)Design and Testing Strategies for Modular 3-D-Multiprocessor Systems Using Die-Level Through Silicon Via Technology., , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 2 (2): 295-306 (2012)