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Hardware Implementation of an Additive Bit-Serial Algorithm for the Discrete Logarithm Modulo 2k.

, , , and . ISVLSI, page 130-135. IEEE Computer Society, (2005)

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A feasibility analysis of fixed-slash rational arithmetic., and . IEEE Symposium on Computer Arithmetic, page 39-47. IEEE Computer Society, (1978)A feasibility analysis of binary fixed-slash and floating-slash number systems., and . IEEE Symposium on Computer Arithmetic, page 29-38. IEEE Computer Society, (1978)Fixed-slash and floating-slash rational arithmetic.. IEEE Symposium on Computer Arithmetic, page 90-91. IEEE Computer Society, (1975)Expose-and-merge exploration and the chromatic number of random graph.. Combinatorica, 7 (3): 275-284 (1987)Ramsey theory for graph connectivity.. J. Graph Theory, 7 (1): 95-103 (1983)Course and program descriptions.. ACM SIGCSE Bull., 2 (1): 12-15 (1970)A term project given in the basic computer science course at Washington University.. ACM SIGCSE Bull., 1 (4): 16-19 (1969)A low power radix-4 dual recoded integer squaring implementation for use in design of application specific arithmetic circuits., , and . ACSCC, page 1819-1822. IEEE, (2008)Preface., , and . RealComp, volume 24 of Electronic Notes in Theoretical Computer Science, page 1. Elsevier, (1998)Determining Edge Connectivity in O(nm). FOCS, page 249-251. IEEE Computer Society, (1987)