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Parametric yield estimation considering leakage variability., , , and . DAC, page 442-447. ACM, (2004)Spatially distributed 3D circuit models., , , and . DAC, page 153-158. ACM, (2005)Power grid voltage integrity verification., , and . ISLPED, page 239-244. ACM, (2005)Efficient techniques for gate leakage estimation., , , and . ISLPED, page 100-103. ACM, (2003)Buffer Insertion with Accurate Gate and Interconnect Delay Computation., , and . DAC, page 479-484. ACM Press, (1999)A Statistical Algorithm for Power- and Timing-Limited Parametric Yield Optimization of Large Integrated Circuits., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (10): 1790-1802 (2007)Analytical yield prediction considering leakage/performance correlation., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (9): 1685-1695 (2006)Closed form expressions for extending step delay and slew metrics to ramp inputs., , , and . ISPD, page 24-31. ACM, (2003)A two moment RC delay metric for performance optimization., , and . ISPD, page 69-74. ACM, (2000)Efficient simulation of interconnect and mixed analog-digital circuits in ACES., and . VLSI Design, page 229-233. IEEE Computer Society, (1995)