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A generic platform for estimation of multi-threaded program performance on heterogeneous multiprocessors.

, , and . DATE, page 1018-1023. IEEE, (2009)

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Power Consumption in Multi-core Processors.. IC3, volume 306 of Communications in Computer and Information Science, page 3. Springer, (2012)Unified Architecture for Double/Two-Parallel Single Precision Floating Point Adder., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 61-II (7): 521-525 (2014)System-Level Design Space Exploration Methodology for Energy-Efficient Sensor Node Configurations: An Experimental Validation., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (4): 586-596 (2012)Allocation of multiport memories in data path synthesis., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 7 (4): 536-540 (1988)A case for design space exploration of context-aware adaptive embedded systems: work-in-progress., , and . CODES+ISSS, page 12:1-12:2. ACM, (2019)E-Super Vertex In-Magic Total Labelings of Digraphs., , and . Electron. Notes Discret. Math., (2015)Super Edge Magic Graceful Labeling of Generalized Petersen Graphs., , and . Electron. Notes Discret. Math., (2015)Speeding up power estimation of embedded software., , and . ISLPED, page 191-196. ACM, (2000)New approach to architectural synthesis: incorporating QoS constraint., , and . EMSOFT, page 301-310. ACM, (2006)PLSS: A Scheduler for Multi-core Embedded Systems., , and . ARCS, volume 10172 of Lecture Notes in Computer Science, page 164-176. Springer, (2017)