Author of the publication

Area-oriented comparison of lightweight block ciphers implemented in hardware for the activation mechanism in the anti-counterfeiting schemes.

, , and . Int. J. Circuit Theory Appl., 45 (2): 274-291 (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Reconfigurable Computing Approach for Tate Pairing Cryptosystems over Binary Fields., , and . IEEE Trans. Computers, 58 (9): 1221-1237 (2009)Comprehensive Evaluation of High-Speed and Medium-Speed Implementations of Five SHA-3 Finalists Using Xilinx and Altera FPGAs., , , , and . IACR Cryptology ePrint Archive, (2012)Very Compact FPGA Implementation of the AES Algorithm., and . CHES, volume 2779 of Lecture Notes in Computer Science, page 319-333. Springer, (2003)Reconfigurable hardware implementation of mesh routing in number field sieve factorization., , , and . FPT, page 263-270. IEEE, (2004)Option space exploration using distributed computing for efficient benchmarking of FPGA cryptographic modules., , , and . FPT, page 113-118. IEEE, (2012)Exploiting system-level parallelism in the application development on a reconfigurable computer., , , , , and . FPT, page 443-446. IEEE, (2003)A Multiplatform Parallel Approach for Lattice Sieving Algorithms., and . ICA3PP (1), volume 12452 of Lecture Notes in Computer Science, page 661-680. Springer, (2020)Fast implementations of secret-key block ciphers using mixed inner- and outer-round pipelining., , and . FPGA, page 94-102. ACM, (2001)A System-Level Design Methodology for Reconfigurable Computing Applications., , and . FPT, page 311-312. IEEE, (2005)Implementation of EAX Mode of Operation for FPGA Bitstream Encryption and Authentication., and . FPT, page 335-336. IEEE, (2005)