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Reformulating the direct convolution for high-performance deep learning inference on ARM processors.

, , , , , , , and . J. Syst. Archit., (February 2023)

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Mixed data layout kernels for vectorized complex arithmetic., , and . HPEC, page 1-7. IEEE, (2017)A Portable GPU Framework for SNP Comparisons., , and . IPDPS Workshops, page 199-208. IEEE, (2019)A scale-free structure for power-law graphs., , and . HPEC, page 1-7. IEEE, (2016)Exploiting Symmetry in Tensors for High Performance: Multiplication with Symmetric Tensors., , , and . SIAM J. Sci. Comput., (2014)Analytical Modeling Is Enough for High-Performance BLIS., , , and . ACM Trans. Math. Softw., 43 (2): 12:1-12:18 (2016)Scalable parallelization of FLAME code via the workqueuing model., , , and . ACM Trans. Math. Softw., 34 (2): 10:1-10:29 (2008)Exploiting Symmetry in Tensors for High Performance, , , and . CoRR, (2013)Efficient SpMV Operation for Large and Highly Sparse Matrices using Scalable Multi-way Merge Parallelization., , , , , and . MICRO, page 347-358. ACM, (2019)PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV., , , , , , and . HPEC, page 1-7. IEEE, (2018)qLD: High-performance Computation of Linkage Disequilibrium on CPU and GPU., , , and . BIBE, page 65-72. IEEE, (2020)