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NoM: Network-on-Memory for Inter-Bank Data Transfer in Highly-Banked Memories.

, , , , , and . IEEE Comput. Archit. Lett., 19 (1): 80-83 (2020)

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Low-power arithmetic unit for DSP applications., , and . SoC, page 68-71. IEEE, (2011)Reconfigurable communication fabric for efficient implementation of neural networks., , and . ReCoSoC, page 1-8. IEEE, (2015)Improving the performance of packet-switched networks-on-chip by SDM-based adaptive shortcut paths., , and . Integr., (2015)Zone Based Control Methodology of Smart Indoor Lighting Systems Using Feedforward Neural Networks., , , and . IST, page 201-206. IEEE, (2018)An energy-efficient virtual channel power-gating mechanism for on-chip networks., , , , and . DATE, page 1527-1532. ACM, (2015)Low-Power Online ECG Analysis Using Neural Networks., , and . DSD, page 547-552. IEEE Computer Society, (2016)A Three-Dimensional Networks-on-Chip Architecture with Dynamic Buffer Sharing., , , and . PDP, page 771-776. IEEE Computer Society, (2016)A reconfigurable network-on-chip architecture for heterogeneous CMPs in the dark-silicon era., and . ASAP, page 76-77. IEEE Computer Society, (2014)A Customized Processing-in-Memory Architecture for Biological Sequence Alignment., , , and . ASAP, page 1-8. IEEE Computer Society, (2018)Energy-Optimized On-Chip Networks Using Reconfigurable Shortcut Paths., , , and . ARCS, volume 6566 of Lecture Notes in Computer Science, page 231-242. Springer, (2011)