Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

SystemVerilog assertion debugging: A visualization and pattern matching model., , , and . PACRIM, page 385-390. IEEE, (2015)Hardware-accelerated service-oriented communication for AUTOSAR platforms., , and . Des. Autom. Embed. Syst., 27 (3): 191-216 (September 2023)Verification of Neural Networks for Safety Critical Applications., , and . ICM, page 1-4. IEEE, (2020)Asil decomposition using SMT.. FDL, page 1-6. IEEE, (2017)A novel approach for system level synthesis of multi-core system architectures from TPG models., , , , and . AICCSA, page 268-275. IEEE Computer Society, (2011)Accelerating iterative protein sequence alignment on a heterogeneous GPU-CPU platform., , , and . HPCS, page 403-410. IEEE, (2016)TLM Based Approach for Architecture Exploration of Multicore Systems-on-Chip., , , and . MTV, page 1-4. IEEE Computer Society, (2011)Automatic test pattern generation for virtual hardware model using constrained symbolic execution., , , and . IDT, page 149-150. IEEE, (2015)FPGA Based Accelerator for 3-SAT Conflict Analysis in SAT Solvers., , and . CHARME, volume 3725 of Lecture Notes in Computer Science, page 384-387. Springer, (2005)Symbolic Execution based Verification of Compliance with the ISO 26262 Functional Safety Standard., and . DTIS, page 1-6. IEEE, (2019)