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Disambiguation of "Yoon, Euisik"

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A Low-Power 2.4-GHz Current-Reused Receiver Front-End and Frequency Source for Wireless Sensor Network.

, , , and . IEEE J. Solid State Circuits, 42 (5): 1012-1022 (2007)

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Ho-Byung Yoon

Chang-Ju Yoon

Deok Ryong Yoon

Seok-Chan Yoon

Jeong-Weon Yoon

 

Other publications of authors with the same name

A CMOS Fingerprint System-on-a-Chip With Adaptable Pixel Networks and Column-Parallel Processors for Image Enhancement and Recognition., , , and . IEEE J. Solid State Circuits, 43 (11): 2558-2567 (2008)A 0.5V 20fJ/conversion-step rail-to-rail SAR ADC with programmable time-delayed control units for low-power biomedical application., , and . ESSCIRC, page 339-342. IEEE, (2011)12.3 PWM buck converter with >80% PCE in 45μA-to-4mA loads using analog-digital hybrid control for impiantale biomedical systems., , , and . ISSCC, page 1-3. IEEE, (2015)A Bidirectional Neural Interface Circuit With Active Stimulation Artifact Cancellation and Cross-Channel Common-Mode Noise Suppression., , , , , , and . IEEE J. Solid State Circuits, 51 (4): 955-965 (2016)Modular 128-Channel Δ-ΔΣ Analog Front-End Architecture Using Spectrum Equalization Scheme for 1024-Channel 3-D Neural Recording Microsystems., , , and . IEEE J. Solid State Circuits, 53 (2): 501-514 (2018)A Low-Power 2.4-GHz Current-Reused Receiver Front-End and Frequency Source for Wireless Sensor Network., , , and . IEEE J. Solid State Circuits, 42 (5): 1012-1022 (2007)A PWM Buck Converter With Load-Adaptive Power Transistor Scaling Scheme Using Analog-Digital Hybrid Control for High Energy Efficiency in Implantable Biomedical Systems., , , and . IEEE Trans. Biomed. Circuits Syst., 9 (6): 885-895 (2015)A 3.1-5.2GHz, Energy-Efficient Single Antenna, Cancellation-Free, Bitwise Time-Division Duplex Transceiver for High Channel Count Optogenetic Neural Interface., , , , , , , , , and . IEEE Trans. Biomed. Circuits Syst., 16 (1): 52-63 (2022)A 3-D Camera With Adaptable Background Light Suppression Using Pixel-Binning and Super-Resolution., , , , , , and . IEEE J. Solid State Circuits, 49 (10): 2319-2332 (2014)Enabling closed-loop neural interface: A bi-directional interface circuit with stimulation artifact cancellation and cross-channel CM noise suppression., , , , , and . VLSIC, page 108-. IEEE, (2015)