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Automatic Dataflow Execution with Reconfiguration and Dynamic Instruction Merging.

, , and . VLSI-SoC, page 30-35. IEEE, (2006)

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Dynamic Instruction Merging and a Reconfigurable Array: Dataflow Execution with Software Compatibility., , and . ARC, volume 3985 of Lecture Notes in Computer Science, page 449-454. Springer, (2006)Trading Time and Space on Low Power Embedded Architectures with Dynamic Instruction Merging., , and . J. Low Power Electron., 1 (3): 249-258 (2005)Automatic Dataflow Execution with Reconfiguration and Dynamic Instruction Merging., , and . VLSI-SoC, page 30-35. IEEE, (2006)Exploiting Java through binary translation for low power embedded reconfigurable systems., , and . SBCCI, page 92-97. ACM, (2005)A Program Construction and Verification Tool for Separation Logic., , and . MPC, volume 9129 of Lecture Notes in Computer Science, page 137-158. Springer, (2015)A framework for establishing Strong Eventual Consistency for Conflict-free Replicated Datatypes., , , and . Arch. Formal Proofs, (2017)OpSets: Sequential Specifications for Replicated Datatypes (Extended Version)., , , and . CoRR, (2018)Programming and Proving with Classical Types., , and . APLAS, volume 10695 of Lecture Notes in Computer Science, page 215-234. Springer, (2017)Verifying strong eventual consistency in distributed systems., , , and . Proc. ACM Program. Lang., 1 (OOPSLA): 109:1-109:28 (2017)Residuated Lattices., and . Arch. Formal Proofs, (2015)