Author of the publication

High performance asynchronous on-chip bus with multiple issue and out-of-order/in-order completion.

, , , , , and . ACM Great Lakes Symposium on VLSI, page 152-155. ACM, (2005)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

High performance asynchronous on-chip bus with multiple issue and out-of-order/in-order completion., , , , , and . ACM Great Lakes Symposium on VLSI, page 152-155. ACM, (2005)An improved implementation method of AHB BusMatrix., and . SoCC, page 211-214. IEEE, (2005)Differential Value Encoding for Delay Insensitive Handshake Protocol., , , and . IEICE Trans. Inf. Syst., 88-D (7): 1437-1444 (2005)A Two-Level On-Chip Bus System Based on Multiplexers., , and . Asia-Pacific Computer Systems Architecture Conference, volume 3189 of Lecture Notes in Computer Science, page 363-372. Springer, (2004)