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Disambiguation of "Rahmeh, Joseph T."

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Algorithm-Based Fault Tolerance on a Hypercube Multiprocessor.

, , , , , , and . IEEE Trans. Computers, 39 (9): 1132-1145 (1990)

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Joseph T Lizier

Bassam Rahmeh

Osama Abu-Rahmeh

T Attin

T Neumann

 

Other publications of authors with the same name

Evaluation of Parts by Mixed-Level DC-Connected Components in Logic Simulation., , and . DAC, page 367-372. ACM Press, (1993)TIDBITS: Speedup Via Time-Delay Bit-Slicing in ALU Design for VLSI Technology., , , and . ISCA, page 28-35. IEEE Computer Society, (1985)Algorithm-Based Fault Tolerance on a Hypercube Multiprocessor., , , , , , and . IEEE Trans. Computers, 39 (9): 1132-1145 (1990)CHAMP: concurrent hierarchical and multilevel program for simulation of VLSI circuits., , , , and . ICCAD, page 246-249. IEEE Computer Society, (1988)Hierarchical multi-level fault simulation of large systems., , , , and . J. Electron. Test., 1 (2): 139-149 (1990)Improving the Accuracy of Dynamic Branch Prediction Using Branch Correlation., , and . ASPLOS, page 76-84. ACM Press, (1992)Interlock Schemes for Micropiplines: Application to a Self-Timed Rebound Sorter., , , and . ICCD, page 393-396. IEEE Computer Society, (1991)FAUST: An MOS Fault Simulator with Timing Information., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 5 (4): 557-563 (1986)Automatic Generation of Behavioral Models from Switch-Level Descriptions., , , , and . DAC, page 179-184. ACM Press, (1989)An evaluation of system-level fault tolerance on the Intel hypercube multiprocessor., , , , , and . FTCS, page 362-367. IEEE Computer Society, (1988)