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A low-cost, 300-MHz, RISC CPU with attached media processor.

S. Santhanam, A. Baum, D. Bertucci, M. Braganza, K. Broch, T. Broch, J. Burnette, E. Chang, K. Chui, D. Dobberpuhl, P. Donahue, J. Grodstein, I. Kim, D. Murray, M. Pearce, A. Silveria, D. Souydalay, A. Spink, R. Stepanian, A. Varadharajan, V. von Kaenel, and R. Wen. IEEE J. Solid State Circuits, 33 (11): 1829-1839 (1998)

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Parthiban Santhanam

Sujatha Pagadala Santhanam

Sai Kumar Kasi Santhanam

Bharani Kumar Pagadala Santhanam

Other publications of authors with the same name

A 160-MHz, 32-b, 0.5-W CMOS RISC Microprocessor.J. Montanaro, R. Witek, K. Anne, A. Black, E. Cooper, D. Dobberpuhl, P. Donahue, J. Eno, G. Hoeppner, D. Kruckemyer and 9 other author(s). Digit. Tech. J., (1997)Entering the hot zone - can you handle the heat and be cool?A. Yang, R. Chandra, S. Burke, J. DeLaCruz, S. Santhanam, and U. Ko. DAC, page 174-175. ACM, (2006)Circuit Implementation of a 300-MHz 64-bit Second-generation CMOS Alpha CPUW. Bowhill, S. Bell, B. Benschneider, A. Black, S. Britton, R. Castelino, D. Donchin, J. Edmondson, H. III, P. Gronowski and 11 other author(s). Digit. Tech. J., (1995)A 160-MHz, 32-b, 0.5-W CMOS RISC microprocessor.J. Montanaro, R. Witek, K. Anne, A. Black, E. Cooper, D. Dobberpuhl, P. Donahue, J. Eno, G. Hoeppner, D. Kruckemyer and 9 other author(s). IEEE J. Solid State Circuits, 31 (11): 1703-1714 (1996)A low-cost, 300-MHz, RISC CPU with attached media processor.S. Santhanam, A. Baum, D. Bertucci, M. Braganza, K. Broch, T. Broch, J. Burnette, E. Chang, K. Chui, D. Dobberpuhl and 12 other author(s). IEEE J. Solid State Circuits, 33 (11): 1829-1839 (1998)A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems.Z. Chen, P. Ananthanarayanan, S. Biswas, B. Campbell, H. Chen, S. Desai, D. Go, R. Goel, V. von Kaenel, J. Kassoff and 18 other author(s). ISSCC, page 104-105. IEEE, (2007)A 300-MHz 64-b quad-issue CMOS RISC microprocessor.B. Benschneider, A. Black, W. Bowhill, S. Britton, D. Dever, D. Donchin, R. Dupcak, R. Fromm, M. Gowan, P. Gronowski and 11 other author(s). IEEE J. Solid State Circuits, 30 (11): 1203-1214 (November 1995)A 200-MHz 64-bit Dual-Issue CMOS Microprocessor.D. Dobberpuhl, R. Witek, R. Allmon, R. Anglin, D. Bertucci, S. Britton, L. Chao, R. Conrad, D. Dever, B. Gieseke and 13 other author(s). Digit. Tech. J., (1992)

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Disambiguation of "Santhanam, Sribalan"

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A low-cost, 300-MHz, RISC CPU with attached media processor.

Please choose a person to relate this publication to

Parthiban Santhanam

Sujatha Pagadala Santhanam

Sai Kumar Kasi Santhanam

Bharani Kumar Pagadala Santhanam

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Santhanam, Sribalan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A low-cost, 300-MHz, RISC CPU with attached media processor.

Please choose a person to relate this publication to

Parthiban Santhanam

Sujatha Pagadala Santhanam

Sai Kumar Kasi Santhanam

Bharani Kumar Pagadala Santhanam

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A low-cost, 300-MHz, RISC CPU with attached media processor.