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Dynamic Diagnosis for Defective Reconfigurable Single-Electron Transistor Arrays.

Y. Li, C. Huang, C. Wu, Y. Chen, C. Wang, S. Datta, and V. Narayanan. IEEE Trans. Very Large Scale Integr. Syst., 25 (4): 1477-1489 (2017)

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Chia-Cheng Wu

Chia-Der Wu

Cheng-Chi Wu

Yueh-Cheng Wu

Hsing-Wu Cheng

Other publications of authors with the same name

Using range-equivalent circuits for facilitating bounded sequential equivalence checking.Y. Chen, W. Ji, C. Wang, C. Huang, C. Wu, C. Lin, and C. Wang. VLSI-DAT, page 1-4. IEEE, (2018)A Hybrid Approach to Equivalent Fault Identification for Verification Environment Qualification.C. Wu, T. Lee, Y. Lai, H. Wang, D. Ji, Y. Chang, T. Wang, C. Liu, C. Wang, and Y. Chen. ACM Great Lakes Symposium on VLSI, page 447-450. ACM, (2018)Substituting Gadolinium in Brain MRI Using DeepContrast.H. Sun, X. Liu, X. Feng, C. Liu, N. Zhu, S. Gjerswold-Selleck, H. Wei, P. Upadhyayula, A. Mela, C. Wu and 5 other author(s). ISBI, page 908-912. IEEE, (2020)Integrated Compressed Sensing and YOLOv4 for Application in Image-storage and Object-recognition of Dashboard Camera.J. Wu, C. Wu, W. Cen, S. Chao, and J. Weng. ANZCC, page 7-11. IEEE, (2021)Diagnosis for Reconfigurable Single-Electron Transistor Arrays with a More Generalized Defect Model.C. Wu, Y. Hu, C. Lin, Y. Chen, J. Huang, and C. Wang. ACM J. Emerg. Technol. Comput. Syst., 17 (2): 15:1-15:23 (2021)Architecture Exploration and Delay Minimization Synthesis for SET-Based Programmable Gate Arrays.C. Wu, K. Ho, J. Huang, and C. Wang. ISVLSI, page 257-262. IEEE Computer Society, (2018)Hybridtrace: A traceroute tool for hybrid networks composed of SDN and legacy switches.S. Wang, C. Wu, and C. Chou. ISCC, page 403-408. IEEE Computer Society, (2016)Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments.C. Liu, C. Lin, Y. Chen, C. Wu, C. Wang, and S. Yamashita. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (12): 2284-2297 (2019)On Synthesizing Memristor-Based Logic Circuits With Minimal Operational Pulses.H. Wang, C. Lin, C. Wu, Y. Chen, and C. Wang. IEEE Trans. Very Large Scale Integr. Syst., 26 (12): 2842-2852 (2018)A Glitch Key-Gate for Logic Locking.D. Ji, H. Chiang, C. Lin, C. Wu, Y. Chen, and C. Wang. SoCC, page 74-79. IEEE, (2019)

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Disambiguation of "Wu, Chia-Cheng"

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Dynamic Diagnosis for Defective Reconfigurable Single-Electron Transistor Arrays.

Please choose a person to relate this publication to

Chia-Cheng Wu

Chia-Der Wu

Cheng-Chi Wu

Yueh-Cheng Wu

Hsing-Wu Cheng

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Wu, Chia-Cheng"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Dynamic Diagnosis for Defective Reconfigurable Single-Electron Transistor Arrays.

Please choose a person to relate this publication to

Chia-Cheng Wu

Chia-Der Wu

Cheng-Chi Wu

Yueh-Cheng Wu

Hsing-Wu Cheng

Other publications of authors with the same name

Disambiguation

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history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Dynamic Diagnosis for Defective Reconfigurable Single-Electron Transistor Arrays.