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Modeling and Energy Optimization of LDPC Decoder Circuits With Timing Violations.

, , and . IEEE Trans. Commun., 66 (3): 932-946 (2018)

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Energy Consumption of VLSI Decoders., and . CoRR, (2014)Modeling and Energy Optimization of LDPC Decoder Circuits with Timing Violations., , and . CoRR, (2015)A Simplified Successive-Cancellation Decoder for Polar Codes., and . IEEE Communications Letters, 15 (12): 1378-1380 (2011)Non-Minimal Trellises for Linear Block Codes., and . Information Theory and Applications, volume 1133 of Lecture Notes in Computer Science, page 111-129. Springer, (1995)Energy, Latency, and Reliability Tradeoffs in Coding Circuits., and . IEEE Trans. Inf. Theory, 65 (2): 935-946 (2019)A Sequential Decoder for Linear Block Codes with a Variable Bias-Term Metric., and . IEEE Trans. Inf. Theory, 44 (1): 410-416 (1998)A Partial Ordering of General Finite-State Markov Channels Under LDPC Decoding., , and . IEEE Trans. Inf. Theory, 53 (6): 2072-2087 (2007)Upper and Lower Bounds on the Computational Complexity of Polar Encoding and Decoding., and . IEEE Trans. Inf. Theory, 65 (9): 5656-5673 (2019)Early Detection and Trellis Splicing: Reduced-Complexity Iterative Decoding., and . IEEE J. Sel. Areas Commun., 16 (2): 153-159 (1998)Block-Interlaced LDPC Decoders With Reduced Interconnect Complexity., , and . IEEE Trans. Circuits Syst. II Express Briefs, 55-II (1): 74-78 (2008)