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A simulation-based comparison of two reflective memory approaches., , and . HICSS (1), page 140-152. IEEE Computer Society, (1995)Hardware approaches to cache coherence in shared-memory multiprocessors, Part 1., and . IEEE Micro, 14 (5): 52-59 (1994)The word-invalidate cache coherence protocol., and . Microprocess. Microsystems, 20 (1): 3-16 (1996)Improved RMS for the PC environment., , , , , and . Microprocess. Microsystems, 19 (10): 609-619 (1995)A simulation study of hardware-oriented DSM approaches., , and . IEEE Parallel Distributed Technol. Syst. Appl., 4 (1): 74-83 (1996)Interconnection Networks in Petascale Computer Systems: A Survey., , , , , and . ACM Comput. Surv., 49 (3): 44:1-44:24 (2016)An operating system accelerator., , , , and . J. Syst. Archit., 44 (9-10): 737-754 (1998)Low-level implementation of the SISC protocol for thread-level speculation on a multi-core architecture., , and . Parallel Comput., (2017)An analysis of chain characteristics in the cryptanalytic TMTO method., and . Theor. Comput. Sci., (2013)Evolution and trends in GPU computing., , and . MIPRO, page 289-294. IEEE, (2012)