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Symmetrical ESD trigger and pull-up using BIMOS transistor in advanced CMOS technology.

P. Galy, J. Bourgeat, J. Jimenez, N. Guitard, A. Dray, G. Troussier, B. Jacquier, and D. Marin-Cudraz. Microelectron. Reliab., 52 (9-10): 1998-2004 (2012)

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Bernd Galyga

Henri Galy

Islam Galy Khalil

Philippe Kersting

Philippe Bopp

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Fast Measurement of BTI on 28nm Fully Depleted Silicon-On-Insulator MOSFETs at Cryogenic Temperature down to 4K.L. Contamin, M. Cassé, X. Garros, F. Gaillard, M. Vinet, P. Galy, A. Juge, E. Vincent, S. Franceschi, and T. Meunier. IRPS, page 7. IEEE, (2022)On the need for a new ESD verification methodology to improve the reliability of ICs in advanced 28nm UTBB FD-SOI technology.B. Viale, M. Fer, L. Courau, P. Galy, and B. Allard. Microelectron. Reliab., (2016)Electro-thermal short pulsed simulation for SOI technology.C. Entringer, P. Flatresse, P. Galy, F. Azaïs, and P. Nouet. Microelectron. Reliab., 46 (9-11): 1482-1485 (2006)ESD protection using BIMOS transistor in 100 GHz RF application for advanced CMOS technology.P. Galy, T. Lim, J. Jimenez, B. Heitz, P. Benech, J. Fournier, and D. Marin-Cudraz. ICICDT, page 199-202. IEEE, (2013)A tunable and versatile 28nm FD-SOI crossbar output circuit for low power analog SNN inference with eNVM synapses.J. Palhares, Y. Beilliard, J. Sandrini, F. Arnaud, K. Garello, G. Prenat, L. Anghel, F. Alibart, D. Drouin, and P. Galy. CoRR, (2023)A full characterization of single pitch IO ESD protection based on silicon controlled rectifier and dynamic trigger circuit in CMOS 32 nm node.J. Bourgeat, P. Galy, A. Dray, J. Jimenez, D. Marin-Cudraz, and B. Jacquier. Microelectron. Reliab., 51 (9-11): 1614-1617 (2011)Computation of Self-Induced Magnetic Field Effects Including the Lorentz Force for Fast-Transient Phenomena in Integrated-Circuit Devices.W. Schoenmaker, Q. Chen, and P. Galy. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 33 (6): 893-902 (2014)6T SRAM performance and power gain using double gate MOS in 28nm FDSOI technology.V. Asthana, M. Kar, J. Jimenez, S. Haendler, and P. Galy. ICICDT, page 89-92. IEEE, (2013)Simulation, characterization and implementation of a new SCR-based device with a turn-off capability for EOS-immune ESD power supply clamps in advanced CMOS technology nodes.J. Loayza, N. Guitard, B. Allard, L. Phung, B. Jacquier, and P. Galy. Microelectron. Reliab., (2018)Impact and damage on deep sub-micron CMOS technology induced by substrate current due to ESD stress.P. Galy, S. Dudit, M. Vallet, C. Richier, C. Entringer, F. Jezequel, E. Petit, and J. Beltritti. Microelectron. Reliab., 49 (9-11): 1107-1110 (2009)

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Disambiguation of "Galy, Philippe"

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Symmetrical ESD trigger and pull-up using BIMOS transistor in advanced CMOS technology.

Please choose a person to relate this publication to

Bernd Galyga

Henri Galy

Islam Galy Khalil

Philippe Kersting

Philippe Bopp

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Galy, Philippe"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Symmetrical ESD trigger and pull-up using BIMOS transistor in advanced CMOS technology.

Please choose a person to relate this publication to

Bernd Galyga

Henri Galy

Islam Galy Khalil

Philippe Kersting

Philippe Bopp

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Symmetrical ESD trigger and pull-up using BIMOS transistor in advanced CMOS technology.