Author of the publication

An Open-Loop Flow Control Scheme Based on the Accurate Global Information of On-Chip Communication.

, , , , , and . DATE, page 1244-1249. ACM, (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A universal ordered NoC design platform for shared-memory MPSoC., and . ICCAD, page 697-704. IEEE, (2015)A systematic IP and bus subsystem modeling for platform-based system design., , , , , , , and . DATE, page 560-564. European Design and Automation Association, Leuven, Belgium, (2006)Optimal voltage allocation techniques for dynamically variable voltage processors., and . DAC, page 125-130. ACM, (2003)Co-design of on-chip caches and networks for scalable shared-memory many-core CMPs.. Massachusetts Institute of Technology, Cambridge, USA, (2018)ndltd.org (oai:dspace.mit.edu:1721.1/118084).Approximation of Curvature-Constrained Shortest Paths through a Sequence of Points., , , , and . ESA, volume 1879 of Lecture Notes in Computer Science, page 314-325. Springer, (2000)Optimal voltage allocation techniques for dynamically variable voltage processors., and . ACM Trans. Embed. Comput. Syst., 4 (1): 211-230 (2005)An Open-Loop Flow Control Scheme Based on the Accurate Global Information of On-Chip Communication., , , , , and . DATE, page 1244-1249. ACM, (2008)A practical approach of memory access parallelization to exploit multiple off-chip DDR memories., , , , , and . DAC, page 447-452. ACM, (2008)In-network reorder buffer to improve overall NoC performance while resolving the in-order requirement problem., , , and . DATE, page 1058-1063. IEEE, (2009)