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System-level performance analysis of multiprocessor system-on-chips by combining analytical model and execution time variation., and . Microprocess. Microsystems, 38 (3): 233-245 (2014)A dataflow specification for system level synthesis of 3D graphics applications., , and . ASP-DAC, page 78-84. ACM, (2001)A Parallel Simulation Technique for Multicore Embedded Systems and Its Performance Analysis., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (1): 121-131 (2012)Explaining Neural Networks Using Attentive Knowledge Distillation., and . Sensors, 21 (4): 1280 (2021)Fast design space exploration framework with an efficient performance estimation technique., , , , and . ESTIMedia, page 27-32. IEEE Computer Society, (2004)A Systematic Design Space Exploration of MPSoC Based on Synchronous Data Flow Specification., , and . J. Signal Process. Syst., 58 (2): 193-213 (2010)Efficient exploration of bus-based system-on-chip architectures., and . IEEE Trans. Very Large Scale Integr. Syst., 14 (7): 681-692 (2006)BP-GAN: Interpretable Human Branchpoint Prediction Using Attentive Generative Adversarial Networks., , and . IEEE Access, (2020)LNA topologies for RX carrier aggregation., , , and . ISOCC, page 21-22. IEEE, (2016)A task remapping technique for reliable multi-core embedded systems., , , , , and . CODES+ISSS, page 307-316. ACM, (2010)