Author of the publication

CyGraph: A Reconfigurable Architecture for Parallel Breadth-First Search.

, , , , and . IPDPS Workshops, page 228-235. IEEE Computer Society, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Reduce, Reuse, Recycle (R3): A design methodology for Sparse Matrix Vector Multiplication on reconfigurable platforms., and . ASAP, page 185-191. IEEE Computer Society, (2013)CyGraph: A Reconfigurable Architecture for Parallel Breadth-First Search., , , , and . IPDPS Workshops, page 228-235. IEEE Computer Society, (2014)A high performance systolic architecture for k-NN classification., , and . MEMOCODE, page 201-204. IEEE, (2014)Shepard: A fast exact match short read aligner., , , , and . MEMOCODE, page 91-94. IEEE, (2012)Anti-virus: a technology update. Infosecurity, 7 (6): 28 - 31 (2010)A 15-bit binary-weighted current-steering DAC with ordered element matching., , , and . CICC, page 1-4. IEEE, (2013)A multi-phase approach to floating-point compression., and . EIT, page 251-256. IEEE, (2015)GEOlimma: differential expression analysis and feature selection using pre-existing microarray data., , and . BMC Bioinform., 22 (1): 44 (2021)Accelerating all-pairs shortest path using a message-passing reconfigurable architecture., , , , and . ReConFig, page 1-6. IEEE, (2015)k-NN text classification using an FPGA-based sparse matrix vector multiplication accelerator., , , , , and . EIT, page 257-263. IEEE, (2015)