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Modular Data Link Layer Processing for THz communication., , , , and . DDECS, page 1-5. IEEE, (2019)An Unnoticed Property in QC-LDPC Codes to Find the Message from the Codeword in Non-Systematic Codes., , , , and . EuCNC, page 6-9. IEEE, (2019)Real-Valued Spreading Sequences for PSSS Based High-Speed Wireless Systems., , , , , and . IEEE Access, (2022)A Hardware Optimized High Throughput LDPC Decoder Supporting 3 Tb/s in 28 nm CMOS., , , , , , , and . PIMRC, page 1326-1331. IEEE, (2022)Early Stopping of BP Polar Decoding Based on Parity-Check Sums., , and . VTC Spring, page 1-5. IEEE, (2022)550 Gbps Fully Parallel Fully Unrolled LDPC Decoder in 28 nm CMOS Technology., , , and . EuCNC, page 429-433. IEEE, (2022)Reduced-complexity decoding implementation of QC-LDPC codes with modified shuffling., , and . EURASIP J. Wirel. Commun. Netw., 2021 (1): 183 (2021)A Modified Rejection-Based Architecture to Find the First Two Minima in Min-Sum-Based LDPC Decoders., , , , and . WCNC, page 1-6. IEEE, (2020)Ultra high speed 802.11n LDPC decoder with seven-stage pipeline in 28 nm CMOS., , , , , , , , and . VTC Spring, page 1-5. IEEE, (2022)Implementation of a Multi-Core Data Link Layer Processor for THz Communication., , , , , and . VTC Spring, page 1-5. IEEE, (2018)