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An 8T SRAM Based Digital Compute-In-Memory Macro For Multiply-And-Accumulate Accelerating.

Z. Wang, H. Luo, Z. Peng, X. Chao, and Y. He. ISCAS, page 1-5. IEEE, (2023)

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Hongxia He

Ning He

Chunmao He

Xiaowen He

Hucang He

Other publications of authors with the same name

A Power-Delay Efficient Hybrid Carry-Lookahead/Carry-Select Based Redundant Binary to Two's Complement Converter.Y. He, and C. Chang. IEEE Trans. Circuits Syst. I Regul. Pap., 55-I (1): 336-346 (2008)A Half-Select Disturb-Free 11T SRAM Cell With Built-In Write/Read-Assist Scheme for Ultralow-Voltage Operations.Y. He, J. Zhang, X. Wu, X. Si, S. Zhen, and B. Zhang. IEEE Trans. Very Large Scale Integr. Syst., 27 (10): 2344-2353 (2019)A New Redundant Binary Booth Encoding for Fast 2n-Bit Multiplier Design.Y. He, and C. Chang. IEEE Trans. Circuits Syst. I Regul. Pap., 56-I (6): 1192-1201 (2009)An area efficient 64-bit square root carry-select adder for low power applications.Y. He, C. Chang, and J. Gu. ISCAS (4), page 4082-4085. IEEE, (2005)A Low-Error Energy-Efficient Fixed-Width Booth Multiplier With Sign-Digit-Based Conditional Probability Estimation.Z. Zhang, and Y. He. IEEE Trans. Circuits Syst. II Express Briefs, 65-II (2): 236-240 (2018)A low-power, high-speed RB-to-NB converter for fast redundant binary multiplier.Y. He, and C. Chang. ISCAS, IEEE, (2006)An 8T SRAM Based Digital Compute-In-Memory Macro For Multiply-And-Accumulate Accelerating.Z. Wang, H. Luo, Z. Peng, X. Chao, and Y. He. ISCAS, page 1-5. IEEE, (2023)A digital calibration technique for multi-bit-per-stage pipelined ADC.Y. He, S. Wang, Q. Ling, and Q. Li. ISIC, page 492-495. IEEE, (2014)Design of an Energy-Efficient Approximate Compressor for Error-Resilient Multiplications.X. Yi, H. Pei, Z. Zhang, H. Zhou, and Y. He. ISCAS, page 1-5. IEEE, (2019)A Subthreshold 10T SRAM Cell with Enhanced Read and Write Operations.J. Zhang, X. Wu, X. Yi, J. Lv, and Y. He. ISCAS, page 1-4. IEEE, (2019)

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Disambiguation of "He, Yajuan"

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An 8T SRAM Based Digital Compute-In-Memory Macro For Multiply-And-Accumulate Accelerating.

Please choose a person to relate this publication to

Hongxia He

Ning He

Chunmao He

Xiaowen He

Hucang He

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "He, Yajuan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An 8T SRAM Based Digital Compute-In-Memory Macro For Multiply-And-Accumulate Accelerating.

Please choose a person to relate this publication to

Hongxia He

Ning He

Chunmao He

Xiaowen He

Hucang He

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

An 8T SRAM Based Digital Compute-In-Memory Macro For Multiply-And-Accumulate Accelerating.