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A low power and area efficient FIR filter chip for PRML read channels.

, , and . ISCAS (4), page 606-609. IEEE, (2001)

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Special session: Low power LDPC deocder using adaptive forced convergence algorithm., , and . MWSCAS, page 309-312. IEEE, (2017)Low complexity synchronizer architecture based on common autocorrelator for Digital Video Broadcasting system., , , and . DPS, page 1-4. IEEE, (2009)High-speed architecture for three-parallel Reed-Solomon decoder using S-DCME., and . ICUIMC, page 77. ACM, (2010)Design and implementation of CAN data compression algorithm., , and . ISCAS, page 582-585. IEEE, (2014)A high-speed FFT processor for OFDM systems., , , and . ISCAS (3), page 281-284. IEEE, (2002)Design of new DSP instructions and their hardware architecture for the Viterbi decoding algorithm., , , and . ISCAS (5), page 561-564. IEEE, (2002)An efficient skipping method of H.264/AVC weighted prediction for various illuminating effects., , and . ISCAS, page 1177-1180. IEEE, (2010)Integer-pel Motion Estimation specific instructions and their hardware architecture for ASIP., , , , and . ISCAS, page 953-956. IEEE, (2011)A continuous flow mixed-radix FFT architecture with an in-place algorithm., , , , and . ISCAS (2), page 133-136. IEEE, (2003)Efficient Deep Learning Algorithm for Alzheimer's Disease Diagnosis using Retinal Images., , , and . AICAS, page 254-257. IEEE, (2022)