( en | de | ru )

 

Disambiguation of "Ciesielski, Maciej J."

Author of the publication

copydeleteadd this publication to your clipboard
Functional Test Generation using Constraint Logic Programming.

, , and . VLSI-SOC, volume 218 of IFIP Conference Proceedings, page 375-387. Kluwer, (2001)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Christian Ciesielski

Mechthild Ciesielski

Thomas Ciesielski

Richard Ciesielski

Axel Ciesielski

 

Other publications of authors with the same name

BDS: a BDD-based logic optimization system., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (7): 866-876 (2002)Clock period minimization with wave pipelining., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (4): 461-472 (1993)Optimizing data flow graphs to minimize hardware implementation., , , , and . DATE, page 117-122. IEEE, (2009)High-Level Dataflow Transformations Using Taylor Expansion Diagrams., , , and . IEEE Des. Test Comput., 26 (4): 46-57 (2009)Formal Methods in Arithmetic Circuit Verification: A Brief History and Look into the Future.. DSD, page xxxiv. IEEE, (2023)Placement for Clock Period Minimization With Multiple Wave Propagation., and . DAC, page 640-643. ACM, (1991)Fast Computation of Data Correlation Using BDDs., , , and . DATE, page 10122-10129. IEEE Computer Society, (2003)Data-flow transformations using Taylor expansion diagrams., , , , and . DATE, page 455-460. EDA Consortium, San Jose, CA, USA, (2007)A BDD-Based Satisfiability Infrastructure Using the Unate Recursive Paradigm., , , and . DATE, page 232-236. IEEE Computer Society / ACM, (2000)LPSAT: a unified approach to RTL satisfiability., , and . DATE, page 398-402. IEEE Computer Society, (2001)