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A CMOS clock recovery circuit for 2.5-Gb/s NRZ data., and . IEEE J. Solid State Circuits, 36 (3): 432-439 (2001)A Low-Power Single-Weight-Combiner 802.11abg SoC in 0.13 µm CMOS for Embedded Applications Utilizing An Area and Power Efficient Cartesian Phase Shifter and Mixer Circuit., , , , , , , , , and 25 other author(s). IEEE J. Solid State Circuits, 43 (5): 1101-1118 (2008)A 5-GHz direct-conversion CMOS transceiver utilizing automatic frequency control for the IEEE 802.11a wireless LAN standard., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 38 (12): 2209-2220 (2003)A Single-Chip Bluetooth EDR Device in 0.13μm CMOS., , , , , , , , , and 15 other author(s). ISSCC, page 558-759. IEEE, (2007)A multistandard, multiband SoC with integrated BT, FM, WLAN radios and integrated power amplifier., , , , , , , , , and 39 other author(s). ISSCC, page 454-455. IEEE, (2010)A fully integrated SOC for 802.11b in 0.18-μm CMOS., , , , , , , , , and 12 other author(s). IEEE J. Solid State Circuits, 40 (12): 2492-2501 (2005)On the Dynamics of Regenerative Frequency Dividers., , and . IEEE Trans. Circuits Syst. II Express Briefs, 53-II (12): 1413-1417 (2006)A 2.5-Gb/s clock recovery circuit for NRZ data in 0.4-μm CMOS technology., and . CICC, page 379-382. IEEE, (2000)