( en | de | ru )

 

Disambiguation of "Farahmandi, Farimah"

Author of the publication

copydeleteadd this publication to your clipboard
Automated test generation for Debugging arithmetic circuits.

, and . DATE, page 1351-1356. IEEE, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Ramin Farahmandi

Farhad Farahmandi

 

Other publications of authors with the same name

AIME: Watermarking AI Models by Leveraging Errors., , , and . DATE, page 304-309. IEEE, (2022)Analyzing Security Vulnerabilities Induced by High-level Synthesis., , , , and . ACM J. Emerg. Technol. Comput. Syst., 18 (3): 47:1-47:22 (2022)SHarPen: SoC Security Verification by Hardware Penetration Test., , , , , , and . ASP-DAC, page 579-584. ACM, (2023)POCA: First Power-on Chip Authentication in Untrusted Foundry and Assembly., , , , , , and . HOST, page 124-135. IEEE, (2021)RTL-FSMx: Fast and Accurate Finite State Machine Extraction at the RTL for Security Applications., , , and . ITC, page 165-174. IEEE, (2022)Invited: End-to-End Secure SoC Lifecycle Management., , , , , and . DAC, page 1295-1298. IEEE, (2021)A new structure for interconnect offline testing., , , , and . EWDTS, page 1-5. IEEE Computer Society, (2013)Trojan localization using symbolic algebra., , and . ASP-DAC, page 591-597. IEEE, (2017)Cost-effective analysis of post-silicon functional coverage events., , , , and . DATE, page 392-397. IEEE, (2017)Automated Debugging of Arithmetic Circuits Using Incremental Gröbner Basis Reduction., and . ICCD, page 193-200. IEEE Computer Society, (2017)