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Real-time FPGA implementation of efficient filter-banks for digitally sub-banded coherent DFT-S OFDM receiver.

, , , , , and . OFC/NFOEC, page 1-3. IEEE, (2013)

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Instruction translation for an experimental S/390 processor., and . SIGARCH Comput. Archit. News, 29 (1): 37-42 (2001)Real-time FPGA implementation of efficient filter-banks for digitally sub-banded coherent DFT-S OFDM receiver., , , , , and . OFC/NFOEC, page 1-3. IEEE, (2013)Flexible real-time transmitter at 10 Gbit/s for SCFDMA PONs focusing on low-cost ONUs., , , , , , , , , and 6 other author(s). DASIP, page 1-8. IEEE, (2014)A 64B CPU Pair: Dual- and Single-Processor Chips., , , , , , , , , and 7 other author(s). ISSCC, page 333-342. IEEE, (2006)Live demonstration: MWC for real-time application., , , , and . ISCAS, page 2002. IEEE, (2011)Hardware calibration of the modulated wideband converter., , , , , , and . GLOBECOM, page 948-953. IEEE, (2014)A 64-bit microprocessor in 130-nm and 90-nm technologies with power management features., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 40 (1): 19-27 (2005)Generic sensing hardware and real-time reconstruction for structured analog signals., , , , and . ISCAS, page 1748-1751. IEEE, (2011)