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Logic Simulation System Using Simulation Processor (SP)., , , , , , , and . DAC, page 225-230. ACM, (1988)Acceleration of mincut partitioning using hardware CAD accelerator TP5000., , and . ASP-DAC, page 61-64. IEEE, (1997)Logic simulation engines in Japan., , and . IEEE Des. Test, 6 (5): 40-49 (1989)Acceleration of behavioral simulation on simulation specific machines., , , , and . ED&TC, page 373-377. IEEE Computer Society, (1997)Efficient placement and routing techniques for master slice LSI., and . DAC, page 458-464. ACM/IEEE, (1980)Speeding Up Look-up-Table Driven Logic Simulation., , and . VLSI, volume 162 of IFIP Conference Proceedings, page 385-397. Kluwer, (1999)Performance Evaluation of an Event-Driven Logic Simulation Machine.. DAC, page 428-431. IEEE Computer Society Press, (1992)A Method to Generate Tests for Combinational Logic Circuits Using an Ultra-High-Speed Logic Simulator., , and . ITC, page 102-107. IEEE Computer Society, (1988)CTL model checking based on forward state traversal., , and . ICCAD, page 82-87. IEEE Computer Society / ACM, (1996)Automatic test program generation for pipelined processors., , , and . ICCAD, page 580-583. IEEE Computer Society / ACM, (1994)