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UNIVERCM: The UNIversal VERsatile Computational Model for Heterogeneous System Integration., , , , and . IEEE Trans. Computers, 62 (2): 225-241 (2013)Moving from co-simulation to simulation for effective smart systems design., , , , , and . DATE, page 1-4. European Design and Automation Association, (2014)Code generation alternatives to reduce heterogeneous embedded systems to homogeneity., , , and . FDL, page 1-4. IEEE, (2013)SystemC Model Generation for Realistic Simulation of Networked Embedded Systems., , , and . DSD, page 423-426. IEEE Computer Society, (2012)Communication-aware design flow for dependable networked embedded systems., , and . ISCAS, page 2861-2864. IEEE, (2011)A design and veri?cation methodology for networked embedded systems.. University of Verona, Italy, (2011)HDTLib: an efficient implementation of SystemC data types for fast simulation at different abstraction levels., , , , and . Des. Autom. Embed. Syst., 16 (2): 115-135 (2012)Automatic generation of cycle-accurate Simulink blocks from hdl ips., , , , and . FDL, page 1-8. IEEE, (2017)Refinement of UML/MARTE models for the design of networked embedded systems., , , and . DATE, page 1072-1077. IEEE, (2012)RTL property abstraction for TLM assertion-based verification., , , and . DATE, page 85-90. ACM, (2015)