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Linearity enhancement techniques in low OSR, high clock rate multi-bit continuous-time sigma-delta modulators.

, , , , , , , and . CICC, page 527-530. IEEE, (2004)

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Linearity enhancement techniques in low OSR, high clock rate multi-bit continuous-time sigma-delta modulators., , , , , , , and . CICC, page 527-530. IEEE, (2004)Nonlinear distortion in current-steering D/A-converters due to asymmetrical switching errors., , and . ISCAS (1), page 285-288. IEEE, (2004)The time course of word retrieval revealed by event-related brain potentials during overt speech, , , and . Proceedings of the National Academy of Sciences, 106 (50): 21442--21446 (Dec 15, 2009)10.7 A 64GS/s 4×-Interpolated 1b Semi-Digital FIR DAC for Wideband Calibration and BIST of RF-Sampling A/D Converters., , , , , , , , , and 1 other author(s). ISSCC, page 176-178. IEEE, (2021)A 6bit, 1.2GSps Low-Power Flash-ADC in 0.13µm Digital CMOS, , , , and . CoRR, (2007)A fully integrated analog front-end macro for cable modem applications in 0.18-μm CMOS., , , , , , and . IEEE J. Solid State Circuits, 37 (7): 866-873 (2002)A 70-mW 300-MHz CMOS continuous-time ΣΔ ADC with 15-MHz bandwidth and 11 bits of resolution., , , , , and . IEEE J. Solid State Circuits, 39 (7): 1056-1063 (2004)A 6bit, 1.2GSps Low-Power Flash-ADC in 0.13µm Digital CMOS., , , , and . DATE, page 223-226. IEEE Computer Society, (2004)A 16-bit 10Gsps current steering RF DAC in 65nm CMOS achieving 65dBc ACLR multi-carrier performance at 4.5GHz Fout., , , and . VLSIC, page 166-. IEEE, (2015)Jitter Noise of Sampled Multitone Signals., and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (10): 652-656 (2011)