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Disambiguation of "Ito, Yasuaki"

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A GPU Implementation of Dynamic Programming for the Optimal Polygon Triangulation.

, and . IEICE Trans. Inf. Syst., 96-D (12): 2596-2603 (2013)

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Yasuaki Saigusa

Nobutaka Ito

Takao Ito

Akio Ito

Hisao Ito

 

Other publications of authors with the same name

The Parallel FDFM Processor Core Approach for CRT-based RSA Decryption., , and . Int. J. Netw. Comput., 2 (1): 79-96 (2012)A GPU Implementation of Bulk Execution of the Dynamic Programming for the Optimal Polygon Triangulation., , and . PPAM (1), volume 10777 of Lecture Notes in Computer Science, page 314-323. Springer, (2017)Bulk execution of the dynamic programming for the optimal polygon triangulation problem on the GPU., , and . Concurr. Comput. Pract. Exp., (2019)Accelerating ant colony optimisation for the travelling salesman problem on the GPU., , and . Int. J. Parallel Emergent Distributed Syst., 29 (4): 401-420 (2014)Simple iterative trial search for the maximum independent set problem optimized for the GPUs., , , , , , , , and . Concurr. Comput. Pract. Exp., (2023)Bulk execution of Euclidean algorithms on the CUDA-enabled GPU., , and . Int. J. Netw. Comput., 6 (1): 42-63 (2016)Implementations of the Hough Transform on the Embedded Multicore Processors., , , and . Int. J. Netw. Comput., 4 (1): 174-188 (2014)An Optimal Implementation of the Approximate String Matching on the Hierarchical Memory Machine, with Performance Evaluation on the GPU., , and . IEICE Trans. Inf. Syst., 97-D (12): 3063-3071 (2014)A GPU Implementation of Dynamic Programming for the Optimal Polygon Triangulation., and . IEICE Trans. Inf. Syst., 96-D (12): 2596-2603 (2013)Low-Latency Connected Component Labeling Using an FPGA., and . Int. J. Found. Comput. Sci., 21 (3): 405-425 (2010)