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F4: Wireless low-power transceivers for local and wide-area networks., , , , and . ISSCC, page 509-511. IEEE, (2017)Two-Dimensions Vernier Time-to-Digital Converter., , and . IEEE J. Solid State Circuits, 45 (8): 1504-1512 (2010)4.5 A Reconfigurable, Multi-Channel Quantized-Analog Transmitter with <-35dB EVM and <-51dBc ACLR in 22nm FDSOI., , and . ISSCC, page 84-86. IEEE, (2024)Low-Power QPSK Transmitter Based on an Injection-Locked Power Amplifier., , and . ESSCIRC, page 134-137. IEEE, (2018)A low-power sub-GHz RF receiver front-end with enhanced blocker tolerance., , and . CICC, page 1-4. IEEE, (2018)A Digital Filtering ADC With Programmable Blocker Cancellation for Wireless Receivers., , , and . IEEE J. Solid State Circuits, 53 (3): 681-691 (2018)20.9 A 1.92mW filtering transimpedance amplifier for RF current passive mixers., and . ISSCC, page 358-359. IEEE, (2016)A 5.4mW GPS CMOS Quadrature Front-End Based on a Single-Stage LNA-Mixer-VCO., , , , , and . ISSCC, page 1892-1901. IEEE, (2006)A 0.13 μm CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier., , , and . IEEE J. Solid State Circuits, 41 (4): 981-989 (2006)Bluetooth low energy receiver system design., , , and . ISCAS, page 465-468. IEEE, (2015)